1. Field of the Invention
The present invention relates to a method for preparing a nano-sheet array structure of a Group V-VI semiconductor; and more specifically, to a method for preparing a nano-sheet array structure of a Group V-VI semiconductor by applying a redox reaction bias.
2. Description of Related Art
Group V-VI semiconductor thermoelectric materials are the class having the best thermoelectric figure of merit at room temperature among all thermoelectric materials, and have a potential for applications in energy conversion and cooling systems. Unlike traditional cooling designs using a compressor and pipelines, solid bismuth telluride-based thermoelectric materials can be advantageously processed into a micro-scale thermoelectric device for chip scale micro-electromechanical components. It still needs a continuous effort for the scientists to keep improving the thermoelectric figure of merit of thermoelectric materials. Nano-structured bismuth telluride-based materials have been proven to effectively and significantly improve the performance of thermoelectric figure of merit both theoretically and experimentally.
The thermoelectric efficiency of a thermoelectric material may be evaluated by the figure of merit ZT: ZT=S2Tσ/κ, wherein T is the absolute temperature, σ is the electrical conductivity, κ is the thermal conductivity. The thermal conductivity can be reduced by increasing the probability of phonon boundary scattering, the electrical conductivity can be increased using quantum confinement, and the nano-structure has been proven to enhance the ZT value.
At present, the typical methods for preparing a nanoscale thermoelectric material include mechanical stripping, metal ion intercalation and rapid thermal stripping. However, the application of these methods is rather limited, because complicated processes and higher manufacturing costs are required to produce the desired nanoscale thermoelectric material, not suited for mass production.
Accordingly, what is needed in the art is to provide a nano-structured material of a Group V-VI semiconductor and a preparing method thereof, which provides a low-cost, relatively simple process for realizing mass production, and a wide range of applications.